Verification and Implementation of High-Speed IP in SoC Design
Qualchip Technologies, Inc.
Jianyu Gu, President of Qualchip. After graduating from Sun Yat-Sen University, Guangzhou, in 1982, Mr.Gu has always cultivated in the field of IC design. He used to lead the Design Center at Dongguang Semiconductors Corp. (No. 878 Factory) and later served as Chief Designer at Beijing IC Design Center (BIDC). In 1995, Mr. Gu continued his professional work in the United States, where he excelled in a number of positions such as: Senior Engineer at Samsung Semiconductors, Principal Engineer at Cadence Design Systems, Director of ASIC at Hifn, and Senior Director of ASIC at Legend Silicon Corp. For over three decades, Mr. Gu had directed, managed and independently designed hundreds of IC projects, all of which have achieved first silicon success.